FPGA demonstrator of a Programmable ML Inference Accelerator - Martin Foltin - ICRC San Mateo, 2019
Martin Foltin, Hewlett Packard, looks at a collaborative work of the Machine Learning (ML) interference accelerator, including PUMA DPE architecture/software stack, memristor emulation, examples, and future projections.
https://rebootingcomputing.ieee.org/rebooting-computing-week/industrycomputingsummit
Martin Foltin, Hewlett Packard, looks at a collaborative work of the Machine Learning (ML) interference accelerator, including PUMA DPE architecture/software stack, memristor emulation, examples, and future projections.