Co-Design of Algorithms & Hardware for DNNs - Vivienne Sze - LPIRC 2018

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    IEEE.tv is made possible by the Members of IEEE.

    This feature is accessible to IEEE Members only, with an IEEE Account. If you are an IEEE Member please sign in to enable this feature.

    In addition to exclusive access to IEEE.tv programming, IEEE members have file download, and can save favorite videos with myTV.

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Vivienne Sze, Microsystems Technology Laboratories at MIT, takes a look at efficiency optimization of algorithm design and considering energy evaluation when building Deep Neural Networks. Sze presents comparisons of adaptations and various examples of existing DNN architecture on different hardware.

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  • Published on
  • September 12, 2019

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