High-Bandwidth and Low-Latency Standardized Interconnect for an Open Chiplet Ecosystem

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#UCIe #chiplets #interconnects #heterogeneous integration #standards

(38:12 +Q&A) Dr. Debendra Das Sharma, Senior Fellow, Intel Corp.

Index:
-- UCIe Consortium and the Open Compute landscape
-- Trends in system interconnects - hierarchy
-- On-package interconnects: opportunities and challenges
-- Design choices: integration, re=use, chiplets
-- The UCIe Open Standard; chiplet interoperability
-- Key metrics, adoption criteria, chiplet ecosystem

Dr. Debendra Das Sharma is an Intel Senior Fellow and co-GM of Memory and I/O Technologies in the Data Platforms and Artificial Intelligence Group at Intel Corporation. He is a leading expert on I/O subsystem and interface architecture. Das Sharma is a member of the Board of Directors for the PCI Special Interest Group (PCI-SIG) and a lead contributor to PCIe specifications since its inception. He is a co-inventor and founding member of the CXL consortium and co-leads the CXL Technical Task Force. He co-invented the chiplet interconnect standard UCIe and is the chair of the UCIe consortium.
Das Sharma has a bachelor’s in technology (with honors) degree in Computer Science and Engineering from the Indian Institute of Technology, Kharagpur and a Ph.D. in Computer Engineering from the University of Massachusetts, Amherst.? He holds 160+ US patents and 400+ patents world-wide. He is a frequent keynote speaker, plenary speaker, distinguished lecturer, invited speaker, and panelist at the IEEE Hot Interconnects, IEEE Cool Chips, IEEE 3DIC, SNIA SDC, PCI-SIG Developers Conference, CXL consortium, Open Server Summit, Open Fabrics Alliance, Flash Memory Summit, Intel Innovation, various Universities (CMU, Texas A&M, UIUC), and Intel Developer Forum. He has been awarded the Distinguished Alumnus Award from Indian Institute of Technology, Kharagpur in 2019, the IEEE Region 6 Outstanding Engineer Award in 2021, the first PCI-SIG Lifetime Contribution Award in 2022, and the IEEE Circuits and Systems Industrial Pioneer Award in 2022.

For edited videos/slides for the plenary talks and working-group presentations, please visit our Silicon Valley EPS chapter's website: https://r6.ieee.org/scv-eps/?p=3049

(38:12 +Q&A) Dr. Debendra Das Sharma, Senior Fellow, Intel Corp.

Index:
-- UCIe Consortium and the Open Compute landscape
-- Trends in system interconnects - hierarchy
-- On-package interconnects: opportunities and challenges
-- Design choices: integration, re=use, chiplets
-- The UCIe Open Standard; chiplet interoperability
-- Key metrics, adoption criteria, chiplet ecosystem ....

Speakers in this video

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