Package Technology, Design, And Methodology Challenges And Solutions For High Bandwidth Electronic Systems

(48:48 + Q&A) -- interchip, IO bandwidth, fan-out, 2.5D packaging, design, analysis, validation ...   Kemal Aygun, Intel Corporation
Summary: As the electronics industry is going through some rapid changes, new electronics systems need to provide increasingly higher performance. As a result, the capability of the components that constitute these systems needs to also scale accordingly. One area where the performance demand has been scaling very aggressively is the input/output (IO) bandwidth among various silicon building blocks in a system. To address this demand, the pace of innovation in semiconductor packaging has also increased greatly in recent years, bringing with it a set of challenges for electrical design, analysis, and validation. This presentation will review some of the recent advances in packaging from scaling of traditional technologies to new emerging technologies such as fan-out level and 2.xD packaging. It will also summarize some of the key challenges and solutions for corresponding electrical methodologies that can be used for design of such packages.
Bio: Kemal Aygün received a Ph.D. in Electrical and Computer Engineering from the University of Illinois at Urbana–Champaign in 2002. In 2003, he joined Intel Corporation, Chandler, AZ, USA, where he is currently a Senior Principal Engineer and manages the High Speed I/O (HSIO) team in the Electrical Core Competency group. He has co-authored five book chapters, more than 80 journal and conference publications, and holds 60 U.S. patents. Dr. Aygün is a Distinguished Lecturer for the IEEE Electronics Packaging Society and was the general chair of the 2020 IEEE Electrical Performance of Electronic Packaging and Systems (EPEPS) conference. He was also a recipient of the SRC GRC Mahboob Khan Outstanding Mentor Award in 2008 and 2015 for his contributions in mentoring SRC academic research projects.