Packaging Challenges in Quantum Computing

(23:46 + Q&A) Dr. Luu Nguyen, PsiQuantum, & IEEE Quantum Initiative Co-Chair, IEEE Future Directions Committee

Index:
-- Quantum computing background & landscape
-- Challenges to overcome
-- The IEEE Quantum Initiative
-- Technology and packaging issues, approaches
-- Focus for the heterogeneous integration roadmap

Dr. Luu Nguyen is the Director of Packaging, Quality, and Reliability at PsiQuantum since 2019, a start-up based in Palo Alto, CA, that aims at building the first large-scale, error-corrected, general-purpose silicon photonics-based quantum computer. He is a member of the IEEE Future Directions (FD) Committee. He’s also a co-lead of IEEE Quantum, an IEEE FD initiative launched to serve as IEEE’s leading community for all projects and activities on quantum technologies. He serves on the Steering Committee for IEEE Quantum Week, the flagship conference on all quantum computing and engineering topics, and participates in many IEEE technical committees (ECTC Packaging Technologies, TC on Reliability, TC on Emerging Technologies, Rel. for Electronics & Photonics Packaging Symposium), award committees (CPMT Field Award, SMTA Society Awards, and ASME Allan Kraus Thermal Management Award, EPPD Awards), and EPS Fellows Nomination committee. He’s currently an Associate Editor for T-CPMT and has been a Guest Editor for three past issues.
He retired as a Fellow at Texas Instruments in 2019, where he worked on various strategic initiatives that included sensors, printed electronics, high voltage packaging, wafer-level packaging, thermal management, design-for-manufacturability, and design-for-reliability. He has a Ph.D. in Mechanical Engineering from MIT and worked at IBM Research, Philips Research, and National Semiconductor. He co-edited two books on packaging technologies, has several book chapters, over 70 patents and invention disclosures, and over 200 publications. He is a Fellow of IEEE and ASME, a Fulbright Scholar (Finland 2002), a Fannie and John Hertz Fellow, and an AAAS Mass Media Science and Engineering Fellow. He received two Best Paper of Conference Awards, one Best Poster of Conference Award, and eight IMAPS and IEMT Best Session of Conference Awards. He received the 2004 IEEE CPMT Outstanding Sustained Technical Contributions Award, the 2015 IEEE Outstanding Engineering Manager Award for the IEEE Region 6, and the 2018 Surface Mount Technology Association Member of Technical Distinction. Other awards also include the 2003, 2014, 2015, and 2016 Mahboob Khan Outstanding Mentor Award from the Semiconductor Research Corporation to recognize contributions to student mentoring, research collaboration, and technology transfer.

For edited videos/slides for the plenary talks and working-group presentations, please visit our Silicon Valley EPS chapter's website: https://r6.ieee.org/scv-eps/?p=3049