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(22:43 + Q&A) Chia-Hsin Lee, Taiwan Semiconductor Research Institute (TSRI) -- Presentation from 2023 Workshop on Quantum Computing: Devices, Cryogenic Electronics and Packaging (QC-DCEP) ...
Summary: The cryo-CMOS control interface circuits are a key enabling technology for the scale-up of quantum computers. To achieve a fidelity of Qubit operation greater than 99.99%, this controller chip needs to perform well with low noise and a Spur-Free Dynamic Range (SFDR) that is larger than 45 dB. Also, the power consumption per channel should be within a few milliwatts to support more Qubits at the 4 K stage. In this talk, the design and measurement challenges of analog, digital, and RF circuits, which are used in the Qubit controller design, are discussed and presented.
At 4 K temperature, the higher MOS threshold voltage (Vth) adds difficulties to analog circuit bias, especially for modern advanced technology nodes. Also, high Vth combined with reduced routing resistance makes the transient time and propagation delay values in the digital synthesis library unreliable and leads to malfunctions in the digital test chip at 4 K temperature. To mitigate the challenges of cryogenic circuit design, putting efforts into 4 K SPICE modeling is essential for a successful implementation of analog and digital circuits. Therefore, the importance of device modeling at 4 K temperature will be presented. In addition, the design experiences of certain controller circuit blocks are provided to explain the significance of bias and power management. Finally, the setups and peripherals to support reliable 4 K circuit measurements are also shown for completeness.
Chia-Hsin Lee received the B.S. and M.S. degrees in electrical engineering from the National Cheng Kung University (NCKU), Tainan, Taiwan, in 2014 and 2016, respectively. She is currently an electronics engineer with the Taiwan Semiconductor Research Institute (TSRI), National Applied Research Laboratories (NARL), Tainan, Taiwan. Her research interests include cryogenic analog circuits, read-out circuits for optical sensors, and high-speed SAR ADCs.
Additional videos from the QC-DCEP Workhop can be accessed at https://attend.ieee.org/qc-dcep.
(22:43 + Q&A) Chia-Hsin Lee, Taiwan Semiconductor Research Institute (TSRI) -- Presentation from 2023 Workshop on Quantum Computing: Devices, Cryogenic Electronics and Packaging (QC-DCEP) ...
Summary: The cryo-CMOS control interface circuits are a key enabling technology for the scale-up of quantum computers. To achieve a fidelity of Qubit operation greater than 99.99%, this controller chip needs to perform well with low noise and a Spur-Free Dynamic Range (SFDR) that is larger than 45 dB ...
