The Future of Hardware Technologies for Computing: N3XT 3D MOSAIC, Illusion Scaleup, Co-Design

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#3D heterogeneous integration #N3XT 3D program #carbon nanotubes #abundant-data computing #scalability #MRAM #RRAM #illusion mappings #chip-to-chip links #edge training #co-design

(47:35 +Q&A)  A look at break-out approaches to 3D heterogeneous integration, N3XT 3D program, with carbon nanotubes, stacked, multiple layers of logic, abundant-data computing, scalability, MRAM, RRAM, illusion mappings, chip-to-chip links, edge training, co-design.

Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He directs the Stanford Robust Systems Group, leads the Computation Focus Area of the Stanford SystemX Alliance, and is a member of the Wu Tsai Neurosciences Institute. His research ranges across Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences. Results from his research group have influenced almost every contemporary electronic system, and have inspired significant government and research initiatives in multiple countries.

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(47:35 +Q&A)  A look at break-out approaches to 3D heterogeneous integration, N3XT 3D program, with carbon nanotubes, stacked, multiple layers of logic, abundant-data computing, scalability, MRAM, RRAM, illusion mappings, chip-to-chip links, edge training, co-design.

Subhasish Mitra is Professor of Electrical Engineering and of Computer Science at Stanford University. He directs the Stanford Robust Systems Group, leads the Computation Focus Area ...

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